The PISMO (Platform Independent Storage Module) Advisory Council contends that the new standard will speed the introduction of more powerful and affordable mobile telecommunications, computing and consumer products.

Simplifying Validation

"We want to reduce the complex test and validation issues that have arisen as the result of the endless combinations of memory and logic chip sets," Fasil Bekele, council chairman, told NewsFactor.

With a standard interface, semiconductor providers can easily add more memory to their development platforms using expansion slots, Bekele said. Thus, it is easier for chip makers to differentiate their product lines and to simplify designs for their customers.

Bekele noted that the wireless and embedded markets are using hundreds of new processors, chipsets and memory types that require testing for compatibility. Lacking a standard interface, system designers have to use a variety of device-specific development boards to ensure compatibility. To address the issue, the PISMO standard will define mechanical and electrical specifications for small form-factor memory modules.

Memory Stacks

PISMO modules will be stackable, enabling product developers to easily add more memory modules, and are backed by tools for evaluating the signals in their memory devices, said Bekele.

The PISMO Advisory Council is led by Spansion, a supplier of NOR Flash memory, and ARM. Other members include global semiconductor and memory firm Toshiba, and wireless technology specialists NanoAmp, Smedia and Spreadtrum.

Each company will participate in developing the PISMO standard, with access to specifications and design collateral.

First Spec Issued

"We hope to get more memory module suppliers on board so that we can create the best combination of system memory development platforms," said Bekele. "There is a lot of verification required for each reference design and memory system, so this is a positive development for system designers."

The council has already released the first version of the specification, defining a standard interface for devices on the Static RAM (SRAM) bus. The new spec will extend support for devices on other memory buses, such as synchronous DRAM (SDRAM) DDR Flash and RAM, NAND and SPI.